Reading...
Play button
Play button
Use LEFT and RIGHT arrow keys to navigate between flashcards;
Use UP and DOWN arrow keys to flip the card;
H to show hint;
A reads text to speech;
25 Cards in this Set
- Front
- Back
|
Single Cycle Design
|
Fetch, Decode and Execute each instruction in one clock cycle
|
|
|
Who invented pipeling
|
ILLIAC II, a project at UIUC publishes first (1958)
– IBM Stretch implements first (1960 |
|
|
What does piplining do to throughput
|
Improves
|
|
|
What does piplining due to latency
|
not reduced
|
|
|
structural hazards
|
attempt to use the same resource by two
different instructions at the same time |
|
|
data hazards
|
attempt to use data before it is read
|
|
|
control hazards
|
attempt to make a decision about program
control flow before the condition has been evaluated and the new PC target address calculate |
|
|
cache
|
small but fast memory
|
|
|
principle of locality
|
present the
user with as much memory as is available in the cheapest technology at the speed offered by the fastest technology |
|
|
Temporal Localit
|
If a memory location is referenced then it will tend to be
referenced again soo |
|
|
Spatial Locality
|
If a memory location is referenced, the locations with nearby
addresses will tend to be referenced soon |
|
|
block (line)
|
the minimum unit of information that is
present (or not) in a cach |
|
|
hit rate
|
the fraction of memory accesses found in a level
of the memory hierarch |
|
|
miss rate
|
the fraction of memory accesses not found in a
level of the memory hierarchy ⇒ 1 - (Hit Rate |
|
|
hit time
|
Time to access that level which consists of
|
|
|
miss penalty
|
Time to replace a block in that level with the
corresponding block from a lower level which consists of |
|
|
write-through
|
always write the data into both the cache block and the next level in
the memory hierarch |
|
|
compulsory
|
cold start or process migration, first
reference |
|
|
capacity
|
Cache cannot contain all blocks accessed by the progra
|
|
|
Spatial Locality
|
If a memory location is referenced, the locations with nearby
addresses will tend to be referenced soon |
|
|
conflict
|
Multiple memory locations mapped to the same cache locatio
|
|
|
block (line)
|
the minimum unit of information that is
present (or not) in a cach |
|
|
early restart
|
processor resumes execution as soon as the
requested word of the block is returne |
|
|
requested word first
|
requested word is transferred from the
memory to the cache (and processor) firs |
|
|
direct mapped cache
|
a memory block maps to
exactly one cache block |
