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24 Cards in this Set
- Front
- Back
What four main components make a computer?
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CPU, Main Memory, I/O Devices and Controllers, System Bus
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What is the MAR?
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Memory Address Register - directs CPU on where memory is ABOUT to be read or written.
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How is the processor kept busy?
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By interleaving fast computation tasks with slow communication.
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What are Processor Registers?
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Very fast memory locations within the CPU
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What are the two types of Processor Registers?
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User-accessible and Status
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What two types of User-accessible processor registers exist?
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Data registers and Address Registers
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What is the role of data registers in the CPU?
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Hold input and output values for and from execution
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What are the types of Address Registers in the CPU?
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MAR, MBR, Index, SP
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What is the MBR?
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Holds address where memory was JUST read or written.
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What is the Index register in the CPU?
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Holds the integer offset for a sequence of memory registers.
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What is the SP in the CPU?
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Stack Pointer - holds the address of memory holding temporary data.
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What are the subtypes of the Status register in the CPU?
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IR, PC, PSW
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What is the IR?
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Instruction Register - holds current executing instruction
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What is the PC?
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Program Counter - holds addresses of next instruction.
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What is the PSW?
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Processor Status Word - whether the processor may be interrupted by I/O
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Define the role of memory.
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To hold instructions and data until they are requested by the processor.
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What three points are in trade-off in the consideration of memory?
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Cost, access time and capacity.
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Summarise the Memory Hierarchy.
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Registers, L1 Cache, L2 Cache, RAM, HDD
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What is the smallest addressable quantum of memory?
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Byte - 8-bit
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What is the 'word'?
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Default data size for the processor, depending on width of buses. Typically 16 or 32-bit.
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Describe the requirement by processors of Alignment of data.
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4-byte quantities must start on byte addresses that are multiples of 4.
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What is a disadvantage of unaligned data?
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Processors which allow this may still have to align the data itself, impacting performance
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What do we see when a bit sequence is interpreted in the wrong context?
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Processor fault / Bus error
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When else will these errors occur?
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When data is unaligned when it should be aligned
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