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194 Cards in this Set
- Front
- Back
ALU = ____
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Arithmetic Logic Unit
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The ALU is part of teh CPU that...
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that actually processes data
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The ALU does what?
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Takes data from the CPU registers, processes it, and copies it back into the registers before moving to next batch of data
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The CPU is also known as the ?
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Microprocessor
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Today's desktop CPU market is dominated by what 2 vendors?
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Intel & American Micro Devices (AMD)
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______ are memory circuits located inside the CPU that hold data before & after processing.
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Registers
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Pentium I & Pentium MMX used primarily __-bit registers.
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32
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Modern CPUs use __-bit & ___-bit register sizes.
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64
128 |
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FPU = _____
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Floating Point Unit
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The FPU component handles...
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calculations based on the IEEE Floating Point Standard
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The FPS (Floating Point Standard) does what?
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Defines a set of codes for representing real numbers in CPU calculations. (Includes fractional numbers)
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The FPU is the specialized CPU component that processes mathematical calculations for graphics programs & 3-D games.
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True
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Where is the FPU on modern PCs integrated?
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With the CPU
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Ancient pre-Pentium CPUs had the FPU chip where & what was it sometimes called.
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It was on a separate FPU chip & was often called the mathcoprocessor to handle FPU mathematics.
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The term Pipeline refers to...
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the series of steps that the CPU follows to process commands.
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Early pre-Pentium CPUs had how many pipelines?
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Only a single pipeline
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A single pipeline can process how many commands at a time?
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1
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What enabled Pentiums to process 2 commands simultaneously?
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The Dual Independent Bus Architecture
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The CPU clock speed is a measurement of what?
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How many calculation cycles a CPU executes per second.
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One calculation cycle per second is equal to ...?
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One hertz (Hz) or Millions of calculations per second...megahertz (MHz)
Billions = Gigahertz (GHz) |
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The clock speed is determined by what 2 things.
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The max speed of the CPU
The max speed that the MOBO can handle. |
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The CPU clock speed is determined....
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by the manufacturer & is set at the factory
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The MOBOs clock speed is governed by...?
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An onboard component called the "System Crystal."
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What oscillates at a fixed frequency when fed current?
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The System Crystal
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What is the System Crystal is usually what material?
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Quartz
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The timing (charges) from the System Crystal go where?
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Onto a special wire called the CLK (or clock wire)
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Each beat of the system crystal onto the CLK wire equals what?
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One cycle on the CPU
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What are the mechanisms the CPUs use to run at even faster speeds that that set by the system crystal clock.
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Clock Multipliers
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Early CPUs could run internally __x's the speed of the MOBO.
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2x's
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___ modern CPUs use clock multipliers.
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All
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Clock Multipliers can range from __x's to excess of __x's and aren't always whole numbers.
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2
20 |
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CPUs have 2 clock speeds.
the 1st is _______ the 2nd is _______ |
Internal
External |
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When you see an advertised CPU speed of 500 MHz, 1.8 GHz, 3Hz and so on.. you're seeing what?
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The multiplied internal CPU speed not the external speed
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SRAM = _____
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Static RAM
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What type of memory aids communication between the CPU & RAM.
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Static RAM (SRAM)
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Normal RAM is called
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Dynamic RAM
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DRAM = ______
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Dynamic RAM
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______ can hold data for only a very short duration before it needs to be refreshed.
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DRAM
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What type of RAM never has to be refreshed
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SRAM
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Which is faster SRAM or DRAM and why?
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SRAM it never has to be refreshed
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What type of memory is the first & fastest type of cache built into the CPU before the Pentium.
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L1, Level 1 cache memory
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L1 caches tend to run around what speed?
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8-32 Kb
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Built-in caches are called _____ while caches on MOBOs are called ______.
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Internal
External |
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External Cache is what level cache, and how many bytes is it?
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Level 2 L2
256Kb - 1Mb |
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Which is faster L1 cache or L2 cache?
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L1, L2 is bigger but usually slower.
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L2 cache was external in the Pentium days, but newer CPUs include onboard L2 cache memory. (T/F)
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True
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What are the known levels of cache?
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L1
L2 L3 (rare) up to 3Mb on high end CPUs. |
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What is the ceramic package that holds the CPU called?
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Die
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"On-Die' refers to what?
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Components that are incorporated into the package, such as L2 cache memory
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Which is cheaper in cost?
SRAM DRAM |
DRAM,
SRAM is usually 10x's more. |
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What is the chip that is a special memory controller mounted on the MOBO that assists the CPU.
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Northbridge
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The _____ _____ chip connects the CPU to the system RAM.
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Northbridge
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What is the collective term for the physical pathways connecting the CPU, Northbridge chip & RAM.
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Frontside Bus
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What 2 pars does the Frontside bus consist of?
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1 Data Bus
2 Address Bus |
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What is the channel that the CPU uses to access data in RAM.
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Data Bus
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What is the pathway that the CPU uses to talk to the Northbridge chip.
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Address Bus
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What bus refers to the pathway that connects the CPU and the L2 cache?
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Backside bus
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Pentium processors & their equivalents have a __-bit data bus & a __-bit address bus.
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64
32 |
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The Pentium-pro had a __-bit address bus available, but only __-bits were used.
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36
32 |
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Itanium & Opteron CPUs have a __-bit address bus.
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64
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What defines the max amount of RAM a CPU can theoretically address.
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The number of wires on the address bus.
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The theoretical amount of RAM a CPU can address is called the ______ ______.
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Address Space
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With a 32-bit address bus, the max amount of memory the CPU can address is...
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2^32 or
4,294,967,296 bytes (4GB) |
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What is the circuit board on which the microprocessor is mounted?
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The CPU Package
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PGA = ______
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Pin Grid Array
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What do PGAs usually look like?
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flat, square, and about 2" across with pins arranged in rows on the bottom side.
(Ex ZIF) |
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PGA CPUs plug into what type of sockets?
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ZIF sockets
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The type of ZIF socket that a PGA CPU uses is determined by what?
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The number of pins on the CPU package.
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At one time, PC makers used coded socket numbering schemes, such as Socket 4 to indicate a 273-pin CPU package.
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True
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A "Socket 370 ZIF" accommodates and Intel ____-pin CPU Package.
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370
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Who started the "Socket X" concept? X being what?
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Intel
X, being the # of pins. |
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What does a SEC usually look like?
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rectangular, roughly 5x2.5" with all pins mounted on the bottom edge.
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SECC = ______
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Single Edge Contact Cartridge
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A fully enclosed design of SEC used by Pentium II & early Celerons was...?
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A design called the SECC
(single edge contact cartridge) |
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The Pentium III & Athlon used a semi-enclosed SEC called the ____.
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SECC2
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What type of CPU came in a package called the SEPP that did away with the plastic casing?
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Celerons
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SEPP = ______
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Single Edge Processor Package
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What was the main difference between the SEPP and the SECC/SECC2.
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The SEPP did not come in any type of plastic casing.
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Intel SEC CPU packages use the ___ _ MOBO socket, with the exception of the Xeon.
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Slot 1
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Xeon SEC CPU uses what type of MOBO socket.
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Slot 2
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What type of CPU came in a package called the SEPP that did away with the plastic casing?
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Celerons
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SEPP = ______
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Single Edge Processor Package
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What was the main difference between the SEPP and the SECC/SECC2.
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The SEPP did not come in any type of plastic casing.
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Intel SEC CPU packages use the ___ _ MOBO socket, with the exception of the Xeon.
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Slot 1
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Xeon SEC CPU uses what type of MOBO socket.
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Slot 2
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What variant of Slot 1 does the AMD Athlon use?
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Slot A
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What was the early Pentium's power requirement?
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5 Volts
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When the CPUs went to lower voltages, MOBOs remained at 5 volts requiring what?
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MOBOs require a built in voltage regulator circuit to control the flow of juice to the CPU
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VRM = ______
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Voltage Regulator Module
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VRMs did what?
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on older systems VRMs controlled the amount of power to the CPU (manually congfigured)
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What are CPU packages usually made of?
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high tech thermal plastics & ceramics that dissipate heat
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Name 3 types of cooling elements that can be found in PCs.
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Heat Sinks
Fans Liquid Cooling Systems |
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What does the Heat Sink look like?
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It is a finned alloy block that rests on the CPU package
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The heat sink must be affixed securely to the CPU package wth what?
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A special Thermal Compound
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Liquid Cooling systems are similar to what?
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Your car's cooling system, by pumping circulated water through hoses to a metal cooling element on the CPU
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In a liquid cooling unit the heated water is pumped through what kind of unit that cools it?
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Heat Exchanger Unit
(Like a Radiator) |
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What type of metal is used as a heat conductor in PC cooling units.
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Copper or other metals
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Which is better, a fan/heat sink system or a Liquid cooling system.
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Liquid, they can keep the CPU at a consistent temp even during peak activity
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The Pentium processor was the first PC processor to have what?
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A 64-bit data bus
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The original Pentium Line had a __-bit data bus, __-bit address bus, and speeds ranging from __ to ___ MHz.
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64 32
60-166 |
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In what year was the Pentium-Pro created?
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1995
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The Pentium-Pro had a ______ socket, ___-pin SPGA format and went into Socket _. With speeds of ___ to ___ Mhz.
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rectangular
387 8 150 - 200 |
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All speeds of the Pentium Pro used _._ Volts with the exception of the ___-MHz version which used _._ volts.
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3.3
3.1 |
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How many pipelines could the Pentium Pro handle?
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It had 4, performing 3 tasks at the same time.
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What was the capacity of the L1 & L2 cache on the Pentium Pro?
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L1 = 16K
L2 = 256KB, 512KB, or 1MB (The L2 was onboard) |
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The Intel Pentium Pro introduced the __-bit address bus but nobody used the extra wires for memory.
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36
Used as a 32 bit bus |
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What was the first Pentium to use the SEC CPU package & when was it introduced?
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Pentium II
1997 |
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How big was the Pentium II data bus and address bus?
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64 bit
36 (effectively 32 bit RAM) could address 4GB of RAM |
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The Pentium II came in what speeds?
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233, 266, 300, 333 MHz
with a system bus speed of 66 MHz |
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When the Pentium II started bing made with 100 MHz system buses, what were the speeds?
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350, 400, & 450 MHz
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How much cache did the Pentium II have? (L1, L2)
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L1 = 32 KB
L2 = 512 KB (ran at 1/2 speed of the processor core) |
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What was the first processor to break away from the PGA form factor & use the SEC?
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Pentium II
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Where did the Pentium II have its L2 cache?
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On a separate part of the SEC package. It was known as on-chip cache
|
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The Pentium III processor was released in?
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1999
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The Pentium III originally came in a ___ -pin package and later switched to the ___-pin PGA form factor.
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242
370 |
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ATC = _____
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Advanced Transfer Cache
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What was the initial core speed & MOBO speed of the Pentium III?
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450 MHz (core)
100 MHz (MOBO) |
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Intel kept cranking up the speeds until the P-III topped out at _._ ?
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1.3 GHz with a 133 MHz system speed
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the Pentium 4 had a __ step pipeline and special instruction sets that enhanced grapics to...?
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20
8 data transfers per clock cycle |
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What 2 packages did the P-4 come in?
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423-pin with 256 KB L2 cache
478-pin with 512 KB L2 cache onboard |
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What was the speed range of the Pentium 4s?
|
1.3 GHz - 3.06 GHz
|
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The first Celerons came in what type of package, and ran at what speeds?
|
SEC CPU package
266 & 300 MHz |
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Later Celerons use ___ packages that plug into ____ ___ MOBOs & ran at speeds up to _._ GHz.
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PGA
Socket 370 2.4 GHz |
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Why did the Celeron have a bad reputation (initially) and changed this how?
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It didn't have onboard L2 cache.
They added 128 K L2 cache |
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Xeon is designed for what?
|
to offer strong multiprocessor support ideally suited for high-performance workstations
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What does the Xeon MP incorporate?
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On-die L3 cache of 512 KB, 1MB or 2MB size
|
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Name a Xeon only slot.
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Slot 2
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Xeons based on what pentium models use the slot 2 SEC package. Later versions used what PGA package?
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Pentium II based xeon
Pentium III based xeon 603-pin PGA package |
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The Itanium & Itanium II are separated from all previous Intel CPUs by what? And how many bytes could it address?
|
The inclusion of a 64-bit address bus.
18 Exabytes (EBs) (6 commas) I.e 18 quintillion bytes |
|
The Itanium uses a __-bit address bus while the Itanium II uses __-bits, for max address space of 17.5TB & 1.1PB.
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44
50 TB = Terabytes (4 commas) PB = Petabytes (5 commas) |
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What type of package does the Itanium use to help house it's big L3 cache.
|
418-pin PAC (Pin Array Cartridge)
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PAC = ______
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Pin Array Package
|
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The Itanium II uses a ___-pin form of PGA that Intel calles OLGA.
|
611 pin
OLGA = Organic Land Grid Array |
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What does the Xeon MP incorporate?
|
On-die L3 cache of 512 KB, 1MB or 2MB size
|
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How many pipelines could the Pentium Pro handle?
|
It had 4, performing 3 tasks at the same time.
|
|
What was the capacity of the L1 & L2 cache on the Pentium Pro?
|
L1 = 16K
L2 = 256KB, 512KB, or 1MB (The L2 was onboard) |
|
The Intel Pentium Pro introduced the __-bit address bus but nobody used the extra wires for memory.
|
36
Used as a 32 bit bus |
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What was the first Pentium to use the SEC CPU package & when was it introduced?
|
Pentium II
1997 |
|
How big was the Pentium II data bus and address bus?
|
64 bit
36 (effectively 32 bit RAM) could address 4GB of RAM |
|
The Pentium II came in what speeds?
|
233, 266, 300, 333 MHz
with a system bus speed of 66 MHz |
|
When the Pentium II started bing made with 100 MHz system buses, what were the speeds?
|
350, 400, & 450 MHz
|
|
How much cache did the Pentium II have? (L1, L2)
|
L1 = 32 KB
L2 = 512 KB (ran at 1/2 speed of the processor core) |
|
What was the first processor to break away from the PGA form factor & use the SEC?
|
Pentium II
|
|
Where did the Pentium II have its L2 cache?
|
On a separate part of the SEC package. It was known as on-chip cache
|
|
The Pentium III processor was released in?
|
1999
|
|
The Pentium III originally came in a ___ -pin package and later switched to the ___-pin PGA form factor.
|
242
370 |
|
ATC = _____
|
Advanced Transfer Cache
|
|
What was the initial core speed & MOBO speed of the Pentium III?
|
450 MHz (core)
100 MHz (MOBO) |
|
Intel kept cranking up the speeds until the P-III topped out at _._ ?
|
1.3 GHz with a 133 MHz system speed
|
|
Itanium 64-bit CPUs weren't backward compatible with 32-bit applications. (T/F)
|
True
|
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An Itanium can run 32-bit applications, but only through special 64-bit emulation programs. (T/F)
|
True
|
|
When was the K5 introduced, what type of form factor did it have and what was it's socket?
|
1995
PGA 296-pin Socket 7 |
|
The K5 speeds ran from __-__MHz and had a __-bit-wide data bus and a __-bit address bus enabling _ GB of RAM.
|
75
116 64, 32 4 |
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The K5 processor ran on _.__ volts of DC power and supported only _ KB of L1 cache.
|
3.52 volts
8 |
|
Aside from the markings on the hip, the __ looked identical to a Pentium.
|
K5
|
|
The K6 series of the AMD had a ___-pin PGA form factor, but used an enhanced Socket 7 ZIF socket called a ___ ___ 7.
|
Super Socket 7
|
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The K6 initially was available in speeds of ___-___ MHz and used _._ volts DC.
|
166-266 MHz
3.3 Volts |
|
By the End of the K6 series, its core speed was 550 MHz with 1 MB of L1 and ran on only 2.2 DC Volts.
|
True
|
|
The Athlon was introduced in ____ and with a speed of ____.
|
1999
500 |
|
What was the first x86 processor to break the 1 GHz mark?
|
Athlon
|
|
Athlons have ___ KB of L1 cache, and either ___ KB or ___ KB of L2 cache.
|
128
256 or 512 |
|
Early Athlons were packaged in the ____ _ SEC CPU package.
|
Slot A
|
|
Slot 1 & Slot A are pin-compatible and can be interchanged. (T/F)
|
False, they are not compatible and are not interchangeable
|
|
The Socket A PGA packaged version of the Athlon can not be plugged into an Intel Socket 370 MOBO. (T/F)
|
True
|
|
Athlon speed ratings are advertised according to their equivalent Pentium CPU speed, this is called a ______ ___?
|
P-Rating
|
|
The AMD CPUs effectively double the communication speed with the Northbridge (T/F)
|
True, a natural match for the DDR SDRAM
|
|
The Duron from AMD has 128 KB of L1 cache but only has 64 KB of L2 cache. (T/F)
|
True
|
|
The Duron has a ___-MHz frontside bus and debuted at ___-MHz & come in a Socket _ PGA form factor.
|
200
600 A |
|
The ______ is AMD's server-level 64-bit CPU.
|
Opteron
|
|
The Opteron uses an internal processing technology called ____ _____.
|
Hyper Transport
|
|
Hyper Transport is more/less an onboard Northbridge chip that enables the Opteron to transfer data at 6.4 GB.
|
True
|
|
Is the Opteron backward compatible with 32-bit applications?
|
Yes unlike the Itanium
|
|
When upgrading a CPU you must make sure it is compatible with what 4 things.
|
1 Motherboard (model&brand)
2 Right speed 3 Voltage 4 RAM |
|
Typically upgrading the CPU means what?
|
Upgrading the heat sink & fan assembly to match the new CPU.
|
|
Thermal Compound is sometimes called what?
1 _____ 2 _____ |
Thermal Paste
Heat Dope |
|
What is the key fo a successful CPU installation? How do you find this info?
|
Make sure the processor & mobo are compatible, from the mobo's documentation.
|
|
Sometimes you can upgrade the speed of CPU that a mobo can handle by updating (flashing) the BIOS. (T/F)
|
True
|
|
When purchasing a new CPU you generally have a choice of what..._____ or _____.
|
Boxed
Unboxed |
|
A "Boxed" CPU means...
|
that the package includes all documentation & drivers, heat sink & fan assembly preinstalled.
|
|
A "Unboxed" CPU means....
|
when purchased ONLY the CPU itself is obtained. You must download documentation & drivers & provide cooling sys.
|
|
Heat Sinks are usually made of what, and with what kind of vanes?
|
Copper or Aluminum Alloy
Thick or Thin vanes |
|
Before Installing a Heat Sink you should always do what?
|
Apply some Thermal Paste
|
|
CPU fans are ratedin ____ or CFM.
|
Cubic Feet per minute
|
|
Typical fans for PGA CPUs are rated around __ CFMs.
|
22
|
|
You can not over-cool a PC. (T/F)
|
True
|
|
Testing CPU Installation
If the system is on but the fan doesn't spin for 5+ seconds, do what? |
Turn the system off and make sure the fan is plugged in correctly.
|
|
Testing CPU Installation
If the fan is spinning but the system doesn't boot... |
Make sure the jumpers governing speed/voltage are set correctly.
|
|
Testing CPU Installation
If after a few minutes you hear a loud alarm... |
Turn off system NOW! check fan installation, ensure good CPU/heatsink contact & fan is working.
|
|
Testing CPU Installation
If the system does not boot & and the fan does not spin... |
Check that the CPU is seated properly and that no other components or cables have been unseated or disturbed
|
|
The frontside bus does what?
|
connects the CPU, Northbridge chip, and RAM
|
|
The backside bus does what?
|
connects the CPU & L2 cache memory.
|
|
Modern Mobos have built in _____ ____ to control the flow of electricity to the CPU. Older mobos had ____.
|
Voltage regulators.
Voltage regulatory modules (VRM) |
|
The Itanium CPU is the 1st to have a 64-bit address bus, but actually only 48 or 52 bits are used. (T/F)
|
False!, they actually use either 44 or 50
|
|
What must be compatible when installing CPUs.
|
CPUs form factor
speed, and voltage |