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18 Cards in this Set

  • Front
  • Back

Register

Small piece of memory located in the processor

ACC

Accumulator - Temporary storage for data being processed

CU

Control unit - Decodes instructions and sends out control signals

MAR

Memory address register - PC contents copied here for the processor to access the next instruction

MDR

Memory data register - Contains instruction or data that's been accessed from memory

PC

Program counter - Stores the address of the next instruction

CIR

Current instruction register - Contains the address of the instruction or data to be accessed in memory

ALU

Arithmetic and logic unit - Carries out calculations and logical instructions

Data bus

Carries the data from one place to another

Address bus

Carries the address where the data is going to and from

Control bus

Carries control signals from the CU to other parts of the system

FDE cycle

Fetch decode execute

Clock speed

Higher clock speed = more cycles per second, therefore more instructions executed so the program runs faster

Cache

Small amount of extremely fast memory in the CPU, used to store currently in use data

Pipelining

Allows one instruction to be fetched as the one before it is being decoded and the one before than is being executed

Von Neumann architecture

- Single CU / ALU


- Data instructions are stored in the same format and area


- Uses same bus for data and instructions so they can't be fetched separately

Harvard architecture

- Physical separate memories for data and instructions


- Used in embedded systems


- Two buses, so data and instructions can be retrieved in parallel

Contemporary architecture

- Aspects of Von Neumann and Harvard


- Pipelining, cache, virtual cores, hyperthreading, multicore, on-board graphics