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38 Cards in this Set
- Front
- Back
Time |
Second (s) millisecond (ms) 10^-3 second microsecond (mew s) 10^-6 second nanosecond (ns) 10^-9 second picosecond (ps) 10^-12 second |
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Frequency |
Hertz (Hz) = # of cycles per second KiloHertz (KHz) = 10^3 Hz MegaHertz (MHz) = 10^6 Hz GigaHertz (GHz) = 10^9 Hz |
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Random Access Memory |
Byte (B) = Group of 8 bits KiloByte (KB) = 2^10 B = 1024 B MegaByte (MB) = 2^20 B = 1024 KB GigaByte (GB) = 2^30 B = 1024 MB |
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Disk Memory (In most cases) |
Byte (B) Sector = 512 B KilByte (KB) = 2^10 B = 1024 B = 2 Sectors MegaByte (MB) = 1000 KB GigaByte (GB) = 1000 MB |
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Communication Data Rate |
bits per second (bps) Kilobits per second (Kbps) = 10^3 bps Megabits per second (Mbps) = 10^6 bps Gigabits per second (Gbps) = 10^9 bps |
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Self Modifying Programs |
A program that modifies the address fields of instructions. |
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Programmed I/O |
(Through CPU) I/O handled by the CPU directly |
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Components of the CPU |
Control Unit (CU) Arithmetic and Logic Unit (ALU) Registers |
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Primary Memory |
RAM |
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Functional Components of First Generation Machines |
Central Processing Unit Primary Memory Secondary or Auxiliary Storage Input Devices Output Devices Interconnection Structure (Bus) |
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Von Neumann Machine Model |
Memory Control Unit Arithmetic Logic Unit (Accumulator within that) Input/Output |
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Computer Organization |
Deals with the functional units of a computer system, their design, performance factors, and how the functional units relate to each other. |
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Computer Architecture |
Deals with the aspects of a computer system a software developer should be aware of, such as CPU registers and their functionality, the instruction set, addressing, modes, etc. |
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Clock Frequency (Clock Rate) |
The number of clock cycles completed per second. Unit of measurement: Cycles per second, or Hertz (Hz). |
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Clock Cycle Time |
The time to complete one clock cycle. Unit of Measurement: second |
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Clock frequency (clock rate) and clock cycle time are _______ of each other. |
Inverse |
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Bit |
Binary digit |
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Cell |
The smallest addressable group of bits |
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Memory Address |
Location in memory of a cell containing data. |
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Maximum number of addressable cells in an n bit address |
2^n |
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Cell size in modern machines |
8 bits, or a byte. |
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A group of bytes |
A word |
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Memory Address Register (MAR) |
Holds either the address from which data will be fetched to the CPU or the address to which data will be sent and stored. |
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Memory Data Register (MDR) |
Also known as the Memory Buffer Register (MBR) Contains either the data to be stored in the computer storage (e.g. RAM), or the data after a fetch from the computer storage. |
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Why is RAM called RAM? |
The access time is independent of the address. |
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Little Endian |
Place least significant byte in lower address. e.g., Intel architecture |
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Big Endian |
Place most significant byte in lower address. e.g., Motorola architecture |
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What cannot be done in hardware directly may be accomplished by __________________. |
writing appropriate software. e.g., think of a computer that can add two numbers and can be controlled to repeat some operation over and over under some circumstance; multiplication can be accomplished by repeated addition. |
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Control Unit (CU) |
Controls the actions of all components in the CPU. Responsible for instruction fetch-decode-execute cycle. |
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Arithmetic and Logic Unit (ALU) |
Performs all arithmetic (addition, subtraction, multiplication, division, etc.) and logical (comparison, AND, OR, NOT, etc.) operations. |
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Registers |
Temporary, high-speed memory in the CPU used to store intermediate values or special data. |
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Accumulator |
A special register in the CPU that participates in several operations, such as addition and multiplication. |
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Flag or condition code register |
A register that is set by most arithmetic and logical operations and consulted for conditional branches. |
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Program Counter (PC) |
Contains the memory of the NEXT instruction to be executed. Also known as the Instruction Pointer |
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Instruction Register (IR) |
Contains the instruction currently being executed. |
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Fetch-Decode-Execute Cycle |
Fetch: 1. Bring next instruction (pointed to by the program counter) from memory into the instruction register. 2. Change program counter to point to next sequential instruction. Decode: 3. Determine type of instruction just fetched. Execute: 4. If instruction uses a data in memory, locate it. 5. If needed, bring data into a CPU register. 6. Execute instruction. Cycle Back: 7. Go to Step 1 to begin the fetch phase of the next instruction. |
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LOAD N, where N is a memory address |
Load the contents of the memory cell N into the special register A (accumulator). |
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Moore's Law |
Observation made in 1965 by Gordon Moore, co-founder of Intel. The doubling of the number of transistors about every 18 months. |