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38 Cards in this Set

  • Front
  • Back

Time

Second (s)


millisecond (ms) 10^-3 second


microsecond (mew s) 10^-6 second


nanosecond (ns) 10^-9 second


picosecond (ps) 10^-12 second

Frequency

Hertz (Hz) = # of cycles per second


KiloHertz (KHz) = 10^3 Hz


MegaHertz (MHz) = 10^6 Hz


GigaHertz (GHz) = 10^9 Hz

Random Access Memory

Byte (B) = Group of 8 bits


KiloByte (KB) = 2^10 B = 1024 B


MegaByte (MB) = 2^20 B = 1024 KB


GigaByte (GB) = 2^30 B = 1024 MB

Disk Memory (In most cases)

Byte (B)


Sector = 512 B


KilByte (KB) = 2^10 B = 1024 B = 2 Sectors


MegaByte (MB) = 1000 KB


GigaByte (GB) = 1000 MB

Communication Data Rate

bits per second (bps)


Kilobits per second (Kbps) = 10^3 bps


Megabits per second (Mbps) = 10^6 bps


Gigabits per second (Gbps) = 10^9 bps

Self Modifying Programs

A program that modifies the address fields of instructions.

Programmed I/O

(Through CPU)


I/O handled by the CPU directly

Components of the CPU

Control Unit (CU)


Arithmetic and Logic Unit (ALU)


Registers

Primary Memory

RAM

Functional Components of First Generation Machines

Central Processing Unit


Primary Memory


Secondary or Auxiliary Storage


Input Devices


Output Devices


Interconnection Structure (Bus)

Von Neumann Machine Model

Memory


Control Unit


Arithmetic Logic Unit (Accumulator within that)


Input/Output

Computer Organization

Deals with the functional units of a computer system, their design, performance factors, and how the functional units relate to each other.

Computer Architecture

Deals with the aspects of a computer system a software developer should be aware of, such as CPU registers and their functionality, the instruction set, addressing, modes, etc.

Clock Frequency (Clock Rate)

The number of clock cycles completed per second.


Unit of measurement: Cycles per second, or Hertz (Hz).

Clock Cycle Time

The time to complete one clock cycle.


Unit of Measurement: second

Clock frequency (clock rate) and clock cycle time are _______ of each other.

Inverse

Bit

Binary digit

Cell

The smallest addressable group of bits

Memory Address

Location in memory of a cell containing data.

Maximum number of addressable cells in an n bit address

2^n

Cell size in modern machines

8 bits, or a byte.

A group of bytes

A word

Memory Address Register (MAR)

Holds either the address from which data will be fetched to the CPU or the address to which data will be sent and stored.

Memory Data Register (MDR)

Also known as the Memory Buffer Register (MBR)


Contains either the data to be stored in the computer storage (e.g. RAM), or the data after a fetch from the computer storage.

Why is RAM called RAM?

The access time is independent of the address.

Little Endian

Place least significant byte in lower address.


e.g., Intel architecture

Big Endian

Place most significant byte in lower address.


e.g., Motorola architecture

What cannot be done in hardware directly may be accomplished by __________________.

writing appropriate software.


e.g., think of a computer that can add two numbers and can be controlled to repeat some operation over and over under some circumstance; multiplication can be accomplished by repeated addition.

Control Unit (CU)

Controls the actions of all components in the CPU.


Responsible for instruction fetch-decode-execute cycle.

Arithmetic and Logic Unit (ALU)

Performs all arithmetic (addition, subtraction, multiplication, division, etc.) and logical (comparison, AND, OR, NOT, etc.) operations.

Registers

Temporary, high-speed memory in the CPU used to store intermediate values or special data.

Accumulator

A special register in the CPU that participates in several operations, such as addition and multiplication.

Flag or condition code register

A register that is set by most arithmetic and logical operations and consulted for conditional branches.

Program Counter (PC)

Contains the memory of the NEXT instruction to be executed.


Also known as the Instruction Pointer

Instruction Register (IR)

Contains the instruction currently being executed.

Fetch-Decode-Execute Cycle

Fetch:


1. Bring next instruction (pointed to by the program counter) from memory into the instruction register.


2. Change program counter to point to next sequential instruction.



Decode:


3. Determine type of instruction just fetched.



Execute:


4. If instruction uses a data in memory, locate it.


5. If needed, bring data into a CPU register.


6. Execute instruction.



Cycle Back:


7. Go to Step 1 to begin the fetch phase of the next instruction.

LOAD N, where N is a memory address

Load the contents of the memory cell N into the special register A (accumulator).

Moore's Law

Observation made in 1965 by Gordon Moore, co-founder of Intel.



The doubling of the number of transistors about every 18 months.