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16 Cards in this Set

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Data Bus Description

Bi-Directional - Carries data to and from memory and to and from I/O controllers.

Word Length

The number of bits processed by the CPU in one go.

Address Bus Description

Uni-Directional - From processor to memory.


Used to access data and instructions stored in memory.

Addressable Memory

The concept that the number of addressable memory locations is limited by the address bus width.

Control Bus Description

Bi-Directional - Sends control signals to registers, the data and address busses.


Controls the flow of data between the processor and other parts of the computer.


Dictates the direction of data transmission through the data bus and whether it was reading/writing to a I/O port.


Also transmits pulses delivered by the system's clock.

I/O Controller

Translates signals from a device into the format required by the processor. Also acts as a buffer for data from the device so the processor doesn't have to wait for each device to respond.

Von Neumann Architecture

A technique for building a processor where data and instructions are stored in the same memory and accessed via busses.

Harvard architecture

A technique for building a processor that uses separate busses and memory for data and instructions.

Advantages of Harvard Architecture

Data and instructions are handled more quickly as they do not share the same bus. Used in systems where there is a specific use, such as burglar alarms rather than within general purpose PCs.

Stored Program Concept

The idea that data and instructions can be stored together in memory.

Register

Small section of temporary storage within the processor.

Status Register

Keeps track of the status of various parts of the computer, such as if an overflow error has occurred or if the last calculation was positive or negative.

Cache Memory

A high-speed temporary area of memory where the most commonly used functions or data used in a program are stored to improve performance.

Interrupt

A signal sent by a device or a program to the processor requesting its immediate attention.

Interrupt Service Routine

Calls the routine required to handle the interrupt. The contents of registers are placed on the system stack. Once the interrupt has been processed the CPU will retrieve these values from the stack and put them back in the correct registers.

Vectored Interrupt Mechanism

A method of handling interrupts by pointing to the first memory address of the instructions needed