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25 Cards in this Set
- Front
- Back
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FSB
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Front Side Bus
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MESIO
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Modified, Exclusive, Shared, Invalid, Owned
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SRI
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System Request Interface
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SMP
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Symettric Multi-Processor
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MISD
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Multiple Instruction Single Data
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CTA
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Candidate Type Architecture
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NIC
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Network Interface Chip
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DMA
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Direct Memory Access
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MIMD
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Multiple Instruction Multiple Data
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Gigaflop
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10^9
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Teraflop
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10^12
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Petaflop
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10^15
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Exaflop
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10^18
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SSE
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Streaming SIMD (Single Instruction Multiple Data) Extensions
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AST
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Abstract Syntax Tree
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Tread (defn)
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Unit of Parallelism
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Mutual Exclusion (defn)
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Atomicity of a piece of code (at most one thread can be doing it at one time)
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FPGA
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Field Programmable Gate Arrays
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SPE
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Synergistic Processing Element
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EIB
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Element Interconnect Bus
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Collective Operations (defn)
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Operations done over the whole network (essentially reduction) e.g. SUM, MIN, MAX
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Memory Latency (defn)
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The time required to make a memory reference
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DRAM
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Dynamic Random Access Memory
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Process (defn)
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A thread that has its own address space
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Throughput (defn)
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The amount of work that can be completed per unit time
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