Computer Systems Chapter 2

Front 1

Circuit has

Back 1

1+ discrete valued input terminals

1+ discrete valued output terminals

functional specification

timing specification

Front 2

functional specification

Back 2

describing relationship b/w inputs and outputs

Front 3

timing specification

Back 3

describing delay b/w inputs changing and outputs responding

Front 4

Circuits are composed of

Back 4

elements and nodes

Front 5

element

Back 5

circuit with inputs, outputs and specification

Front 6

node

Back 6

wire with voltage conveying, a discrete valued variable. Nodes classified as input, output or internal

Front 7

combinational circuit

Back 7

depends only on current value

Front 8

sequential circuit

Back 8

depends on previous values of inputs

Front 9

combination composition

Back 9

rules of how we can build larger combinational circuit from smaller combination circuit elements

Front 10

circuit is combinational if

Back 10

every element is combinational

Every node of the circuit is eiehter designated ad an input to the circuit or connects to exacly one output terminal of a circuit

Circuit contains no cyclic path

Front 11

product

Back 11

AND

Front 12

sum

Back 12

or

Front 13

sum of products

Back 13

function of sum and products shows miniterms- true terms

Front 14

products of sum cannonical form

Back 14

each row shows maxterms-false terms

Front 15

schematic

Back 15

diagram of a digital circuit showing the elements and the wires that connect together

Front 16

real circuits

Back 16

can have illegal values

Front 17

x

Back 17

indicates illegal value

Front 18

z

Back 18

value is inconsistent

Front 19

logic synthesizers

Back 19

produce simplified circuits

Front 20

multiplexer

Back 20

choose an output from among several possible inputs based on the value of a select signal

Front 21

decoder

Back 21

Asserts exactly one of its outputs depending on the input combination

Front 22

timing diagram

Back 22

shows delay b/w input change and subsequent output change for a buffer

Front 23

rising edge

Back 23

time from low to high

Front 24

falling edge

Back 24

time from high to low

Front 25

propagation delay

Back 25

maximum time from when an input changes until the output or outputs reach their final value

Front 26

glitches

Back 26

when a single input transition can cause multiple output transitions.