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21 Cards in this Set

  • Front
  • Back
IF
Instruction fetch from memory
ID
Instruction decode & register read
EX
Execute operation or calculate address
DM
Access memory operand
WB
Write result back to registers
Super-pipeline Machines
machines that divide stages of a pipeline to sub-stages to increase the number of supported instructions
Superscalar Machines
machines that allow several instructions to be initiated simultaneously and executed independently
Static Multiple Issue
uses smart compiler to detect and resolve hazards
Dynamic Multiple Issue
uses hardware to detect and resolve hazards at runtime
Dynamic Scheduling
hardware support for reordering the order of instructions

Execution time for non pipelined

E = nkt


or t*# of instructions

Execution time for pipelined

E = (k + n -1)t

Instruction are done on one cycle for _______

single cycle

Dependencies without forward

place ID and WB on same cycle

place ID and WB on same cycle

Dependencies with forward

output of EX to input of EX (arithmetic)


output of DM to input of EX (load/store)

Instruction Memory
provides read access to instructions
Register File
output contents within registers
ALU
calculate arithmetic results
Data Memory
write register value to memory
Sign-extend
sign-extends 16 bit input to 32 bit output

Handling Exceptions

1. Save offending address to EPC (Exception Program Counter)


2. Save indication of the problem in Cause Register


3. Jump to handler