Test And Security Evaluation Narrative Essay

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TEST AND SECURITY EVALUATION PLATFORM

Background Work:
The need for safe and secure identity authentication is increasing day by day as the number of identity theft occurrences is growing. The strongest security is implemented within the hardware itself. There are two key concepts in designing for testability: Controllability and Observability. Controllability refers to the ability to apply test patterns to the inputs of a sub circuit via the primary inputs of the circuit. Observability refers to the ability to observe the response of a subcircuit via the primary inputs or at some other output points. Testing requires access to the internal workings of the device under test (DUT). This is in conflict with the need for secrets to be hidden.
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Any combination of the three elements may be used for authentication purpose. Secure transmissions are required when data transfer is required between the islands of security via an open sea. The communication channel between the secure environments is unsecure. The security goals can be met from time to time using encryption. There are three main types of classical encryption methods or ciphers: transposition, substitution and product ciphers. One of the well known and most widely used asymmetric encryption methods is RSA algorithm. Another technology for hiding data within the contents is ‘Digital Watermarking’. Traditional watermarks may be applied to visible media (image or whereas in digital watermarking, the signal may be audio, pictures, video, texts, or 3D models. The formal study of information hiding is called ‘steganography’.
The tradeoffs between efficiency and security also apply to storage and
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This technology can also be used for chip configuration, key locking/unlocking, real time bugging etc. These scan paths also introduce a security critical information leak channel into a design. A new scan path called differential scan path (DiSP) is introduced which divides the internal state of the scan path into two sections.
A device is capable of testing itself which is known as Built-In Self-Test (BIST). A metric for quality and successful testing is fault coverage. Fault Coverage is the number of stuck at faults detected. In hardware, the implementation of BIST is with a Linear Feedback Shift Register (LFSR) which uses the remainder left in the register. This remainder is called a signature and this technique is called signature analysis. Signature analysis is an efficient technique for compressing the DUT’s output responses in BIST.
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