4.1.2 Pipelined ADC
The pipelined ADC is one of the most popular ADC architecture. The pipelined ADC architecture is similar to the sub-ranging ADC. The architecture of pipelined ADC is implemented by at least two or more low resolution flash ADCs. The pipelined ADC works from few M samples to more than hundred of M samples with resolution from 8 bit to 16 bits. Due to its high resolution and sampling rate range it is widely used in medical and communication applications like as CCD imaging, base station, ultrasonic medical imaging, DSL, cable modem, digital receiver, digital video (HDTV) and fast Ethernet [79].
Fig. 4.5. Block diagram of a pipelined ADC
Figure 4.5 Shows the complete architecture of the pipelined ADC. A sample and …show more content…
The another advantage of this ADC is it is less complex because the DAC circuit is not used in the ADC architecture. The main drawback of this ADC is that it is only suitable for low bandwidth input signals.
4.2 Summary of ADC Architectures
All the most popular ADC architectures have been explained in detail in previous sections. The flash ADC architecture is the fastest, the SAR ADC gives low power applications, the ∑∆ ADC is useful for high resolution applications. All the ADCs have tradeoffs in terms of speed, resolution and power consumption. In summary, Table 4.1 provides the characteristics of four popular ADC architectures. Here in third column, “sps” stands for samples per second and in forth column “m” is the number of stages in pipelined ADC and “n” is the resolution of ADC.
Table 4.1. Summary of ADC architectures
Architecture of ADC Flash ADC Pipelined ADC SAR ADC Sigma-Delta ADC Dual slope ADC
Selection of ADC High speed applications with low resolutions (3 to 5 GHZ) Medium speed application and medium to high resolution Medium resolution application with low speed Low to medium speed application and high resolution High resolution and low bandwidth
The pipelined ADC is one of the most popular ADC architecture. The pipelined ADC architecture is similar to the sub-ranging ADC. The architecture of pipelined ADC is implemented by at least two or more low resolution flash ADCs. The pipelined ADC works from few M samples to more than hundred of M samples with resolution from 8 bit to 16 bits. Due to its high resolution and sampling rate range it is widely used in medical and communication applications like as CCD imaging, base station, ultrasonic medical imaging, DSL, cable modem, digital receiver, digital video (HDTV) and fast Ethernet [79].
Fig. 4.5. Block diagram of a pipelined ADC
Figure 4.5 Shows the complete architecture of the pipelined ADC. A sample and …show more content…
The another advantage of this ADC is it is less complex because the DAC circuit is not used in the ADC architecture. The main drawback of this ADC is that it is only suitable for low bandwidth input signals.
4.2 Summary of ADC Architectures
All the most popular ADC architectures have been explained in detail in previous sections. The flash ADC architecture is the fastest, the SAR ADC gives low power applications, the ∑∆ ADC is useful for high resolution applications. All the ADCs have tradeoffs in terms of speed, resolution and power consumption. In summary, Table 4.1 provides the characteristics of four popular ADC architectures. Here in third column, “sps” stands for samples per second and in forth column “m” is the number of stages in pipelined ADC and “n” is the resolution of ADC.
Table 4.1. Summary of ADC architectures
Architecture of ADC Flash ADC Pipelined ADC SAR ADC Sigma-Delta ADC Dual slope ADC
Selection of ADC High speed applications with low resolutions (3 to 5 GHZ) Medium speed application and medium to high resolution Medium resolution application with low speed Low to medium speed application and high resolution High resolution and low bandwidth