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25 Cards in this Set

  • Front
  • Back
Base Register
holds the smallest legal physical memory address.
limit register
specifies the size of the range
contiguous memory allocation
each process is contained in a single section of memory that is contiguous to the section containing the next process
transient OS code
it comes and goes as needed. Using this code changes the size of the operating system during program execution.
First fit
Allocate the first hole that is big enough. Searching can start at the beginning of the set of holes or at the location where the previous search ended. Stops searching once a free hole is large enough.
Best fit
Allocate the smallest hole that is big enough. We must search the entire list unless the list is ordered by size. Produces smallest leftover hole.
Worst fit
Allocate the largest hole. Searches the entire list, unless sorted by size. Produced the largest leftover hole.
logical address space
The set of all logical addresses generated by a program. A collection of segments.
physical address space
the set of all physical address es corresponding to the logical addresses.
memory management unit (MMU)
A hardware device that does the run-time mapping from a virtual to a physical address.
external fragmentation
As processes are loaded and removed from memory, the free memory space is broken into little pieces. There is enough memory to satisfy a request, but the available space in not contiguous.
internal fragmentation
The idea when there is over-allocation of memory space to a process. Unused memory that is internal to a partition.
Segmentation
A memory-management scheme that supports the programmer's point of view.
segment base
contains the starting physical address where the segment resides in memory.
segment limit
specifies the length of the segment.
Logical address
Consists of two parts: a segment number s, and an offset to that segment, d.
Paging
Memory-mgmt scheme permits the physical address space of a process to be non contiguous. Avoids external fragmentation and the need for compaction. Also solves the problem of fitting various memory chunks onto the backing store.
frames
fixed-sized blocks of physical memory
pages
logical memory blocks of the same size.
page table
contains the base address of each page in physical memory
translation look-aside buffer
A cache that memory management hardware uses to improve virtual address translation speed
hierarchical paging
Break up virtual address space into multiple
page tables at different levels
hashed paging
A common approach to handling address spaces larger than 32 bits. Hash values determine the virtual page number.
inverted paging
Has one entry for each real page (or frame) of memory. Each entry consists of the virtual address of the page stored in that real memory location, w/ info about the process that owns the page.
effective memory-access time
a calculation of the time it takes to find a desirable page number in the translation look-aside buffer (TLB)