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83 Cards in this Set

  • Front
  • Back
Speed
Most important in differentiating primary and secondary storage
Access time
time required to perform one complete read or write operation
Average access time
when access time varies with storage location the average is of all location access times
Block
generic term for describing secondary storage data transfer units
data transfer rate
dividing 1 by the access time in seconds and multiplying the result by the unit of data transfer
non volatile storage
holds data without loss over long periods
volatile storage
cant hold data reliably for long periods
serial access
storage devices stores and retrieves data items in a linear, or sequential, order ie vhs
random access or direct access
isnt restricted to any specific order when accessing data
parallel access
access multiple storage locations simultaneously
portability
entire storage devices can be transported between computer systems or the storage medium can be removed from the storage devices and transported to a compatible storage medium on another computer
cost
speed, volatility, access method, portability, and capacity change this
random access memory
primary storage with microchip implementation with semi conductors, capability to read and write with equal speed, random access to stored bytes, words, or larger data units
Static Ram (SRAM)
entirely transitiors, require continuous supply of electrical power to maintain positions
dynamic ram (DRAM)
each bit has a transistor and capacitor, refresh automatically, cant refresh at the same time as read write
refresh cycle
when dram performs a refresh operation
synchronous dram (SDRAM)
read ahead ram that uses same clock pulse as the system bus
double data rate (DDR)
supports clock rate up to 1 GHz and reads or writes eight 64-bit words per clock cycle
nonvolatile memory (NVM)
forms of RAM with long-term or permanent data retention
firmware
software stored on nvm
read-only memory (ROM)
earliest type of nvm
erasable programmable ROM (EPROM)
manufactured blank, writeen with a special EPROM writer, and erased by exposure to uv light
electronically erasable programmable ROM (EEPROM)
can be programmed,erased, and reprogrammed by signals sent from a cpu
flash RAM
most common nvm, similar to DRAM in capacity and read performance, but lacks write performance. each write degrades the storage cell
magnetoresistive RAM (MRAM)
stores bit values by using two magnetic elements, one with fixed polarity and the other with polarity that changes when a bit is written. comparable read and write with SRAM and densitites comparable to DRAM, does not degrade like flash ram
phase change memory (PCM)
uses glass like compound of germanium antimony and tellurium. switches at certain heat from amorphous to crystalline and gives off different reflectivity
read/write head
what the wire is coiled around
magnetic storage
uses read/write head to generate magnetic field that is stored on a magnetic storage medium
magnetic disk
flat circular platters with metallic coatings that are rotated beneath read/write heads
track
one concentric circle of a platter/ surface area under a read/write head when its position is fixed
cylinder
all the tracks at a equivalent distance from the edge or spindle on all platter surfaces
access arm
where the read/write head is mounted
hard disk
magnetic disk medium with a rigid metal base
drive array
multiple hard disks in a single storage cabinet
Solid state drive
mimics a magnetic disk drives behavior but uses flash ram or other nvm devices as the storage medium and read write mechanism
optical mass storage
tightly focused lasers that can access a very small storage medium area, bits are stored by variations in light reflection of the medium
bus
shared electrical or optical channel that connects two or more devices
peripheral devices
reference to all i/o, storage devices
data bus
transmits data between computer system components
address bus
transmits a memory address when primary storage is the sending or receiving device
control bus
carries commands, command responses, status codes, and similar messages
bus protocol
governs the format content and timing of data memory addresses and control messages sent across the bus
bus master
cpu is the focus of all computer activity and takes this role
bus slaves
everything else not the master
direct memory access DMA
assumes role of bus master for all transfers between memory and other storage or i/o devices
peer to peer bus
any device can assume control of the bus or act as a bus master for transfers to any other device
memory bus
connects only the cpu and memory, higher data transfer rate than the system bus becous of shorter length
video bus
connects only memory and video interface
storage bus
connects secondary storage devices to the system bus
external i/o bus
connects one or more external devices to the system bus
logical access
read or write operation from a storage devices
linear address space
set of sequentially numbered storage locations
device controller
implement the bus interface and access protocols. translate logical accesses into physical accesses. enable serveral devices to share access to a bus connection
i/o channel. channel
varies from device controller in number of devices that can be controlled, variability in type and capability of attached devices. maximum communication capacity
interrupt handlers
os service routine to process each possible interrupt
supervisor
master interrupt handler program, examines interrupt code stored in the interrupt register and uses it as an index to the interrupt table
multiple interrupts
grouping and prioritizing when there are more than one interrupt and the cpu is busy
stack
mechanism that enable a program to rsume execution in exactly the same state as before an interruption is called (LIFO)
push
added to the stack
pop
adding back to the correct register
stack overflow
a push to a full stack
stack pointer
special purpose register always points to the next empty address
buffers
small storage areas that hold data in transit from one device to another
buffer overflow
buffer isnt large enough to hold a full page
cache
like a buffer but only used for storage device accesses larger than buffer normally
video controllers
enables communication between computer system and monitor, generates analog or digital video signals
communication protocols
rules for message and transmission
message
data and command content
encoding and transmitting
data bits can be encoded into analog or digital signals
carrier waves
sine wave with encoded bits
phase
waves cycle
analog signals
uses full range of carrier wave characteristics to encode continuous data values, can represent any data value within a continuum of values
digital signals
can contain one of a finite number of possible values
square wave
contains abrupt amplitude shifts between two different values
voltage ranges
binary signaling method using voltage ranges
signal capacity and errors
analog signals compared to digital are susceptible to transmission error but carry more information
transmission media
communication path that transports signals
frequency
basic measure of data-carrying capacity
bandwidth
difference between max and min frequencies of a signal
electrical cabling types
twisted pair limited bandwidth, axial offeres higher bandwidth
optical cabling
high bandwidth, little internally generated noise and distortion, requires amplifiers and repeaters
parallel transmission
uses a separate transmission line for each bit position
serial transmission
uses a single line to send one bit at a time, more reliable over much longer distances