Abstract—In this paper we have proposed speculative Han-Carlson adder. The proposed adder Employs speculation: the exact mathematic function is replaced with an approximated one that is faster and gives the correct result most of the time, but not for all time. The approximated adder is augmented with an error detection network that asserts an error signal when speculation fails. The speculative adder to reduce delay and power consumption compared to non-speculative adder and simulated using ModelSim 6.3f. Delay and power consumption of non-speculative and speculative Han-Carlson adder were analyzed using Xilinx ISE 8.1i.
Keywords—Addition, mathematic, non-speculative adder, speculative adder, delay, power consumption. 1. INTRODUCTION
Adders …show more content…
5. 16-bit Non-Speculative Han-Carlson Adder
This adder has five stages in which the middle three stages are resembles with the Kogge-Stone structure. The advantage of this adder is that it uses much less cells and its shorter span wires than the Kogge-Stone adder and thus there is reduction in complexity at the cost of an additional stage for carry-merge path. The main drawback of this adder is that increased power consumption.
4. PROPOSED WORK
This work 16-bit speculative Han-Carlson adder (HCA) is proposed. Speculative prefix adders can be subdivided in five stages: pre-processing, speculative prefix-processing, post-processing, error detection and error correction. The error correction stage is off the critical path, as it has two clock cycles to obtain the exact sum when speculation fails.
4.1 Pre-processing stage The propagate and generate signals are computed as in equations (1) & (2).
4.2 Speculative Prefix-processing stage
The last Kogge-Stone row of the n = 16 bit graph is shortened, resulting in a speculative prefix-processing stage with K = 8 is shown in Fig. 6. The length of the propagate chains is K = 8 only for i = 9,11,13,15, while for i = 10,12,14 the propagate chain length is K+1 = 9. The computed propagate and generate signals for the speculative Han-Carlson architecture
Keywords—Addition, mathematic, non-speculative adder, speculative adder, delay, power consumption. 1. INTRODUCTION
Adders …show more content…
5. 16-bit Non-Speculative Han-Carlson Adder
This adder has five stages in which the middle three stages are resembles with the Kogge-Stone structure. The advantage of this adder is that it uses much less cells and its shorter span wires than the Kogge-Stone adder and thus there is reduction in complexity at the cost of an additional stage for carry-merge path. The main drawback of this adder is that increased power consumption.
4. PROPOSED WORK
This work 16-bit speculative Han-Carlson adder (HCA) is proposed. Speculative prefix adders can be subdivided in five stages: pre-processing, speculative prefix-processing, post-processing, error detection and error correction. The error correction stage is off the critical path, as it has two clock cycles to obtain the exact sum when speculation fails.
4.1 Pre-processing stage The propagate and generate signals are computed as in equations (1) & (2).
4.2 Speculative Prefix-processing stage
The last Kogge-Stone row of the n = 16 bit graph is shortened, resulting in a speculative prefix-processing stage with K = 8 is shown in Fig. 6. The length of the propagate chains is K = 8 only for i = 9,11,13,15, while for i = 10,12,14 the propagate chain length is K+1 = 9. The computed propagate and generate signals for the speculative Han-Carlson architecture